Senior Logic Design Engineer
Core
Design and implement digital logic micro-architecture for on-chip monitoring IP that enables chips to report on their own health.
Role type
Senior IC logic design engineer (VLSI/ASIC)
Builds
On-chip monitoring IP blocks (digital logic) for advanced chips
Domain
Semiconductor / VLSI / On-chip monitoring
Deliverable
production ML models (via careerplan.io/jobs/D5-00E-05-F69-senior-logic-design-engineer-at-proteantecs)
Required skills
RTL design, SystemVerilog, static analysis tools (Lint, CDC, RDC), VLSI front-end design, low-power design techniques, DFT design flows
Preferred skills
Python, Git, Unix-like environments
Responsibilities
Define and implement digital logic micro-architecture; Verify design quality using static analysis tools; Collaborate with circuit engineers to integrate low-level designs; Work with verification engineers for simulation and debugging; Coordinate with physical design engineers for correct implementation
