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Senior ASIC Verification Engineer

Roseville, California, United States of America💼 Full-time💰 $153,500–$310,500🗓 2026-06-09 → 2026-07-31

Core

Lead VLSI design, verification, and implementation for complex HPE products, solutions, and platforms.

Role type

Senior IC ASIC Verification Engineer (VLSI)

Builds

Reliable, cost-effective, high-quality VLSI prototypes and production solutions

Domain

Semiconductor / Hardware / VLSI

Deliverable

production ML models | product features | infrastructure

Required skills

VLSI design and verification, Verilog/System Verilog, UVM methodologies, Python/Perl/TCL scripting, C/C++ programming, EDA tools, FPGA tools, digital logic, computer architecture

Preferred skills

Specman, patents/publications in VLSI or hardware design

Technologies

Verilog, System Verilog, UVM, Python, Perl, TCL, C, C++, EDA, FPGA

Responsibilities

Lead project teams of Electronic and VLSI engineers and partners through all design and development stages; review and evaluate designs for compliance with VLSI standards; provide technical expertise and platform leadership on cross-organization projects; mentor less experienced staff; drive VLSI innovation and integration of new technologies

Seniority

Senior, hands-on IC with team leadership

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