CareerPlan

ASIC Design Manager

Boulder, CO, United StatesFull-time2026-10-06 → 2026-10-24

Core

Lead and execute the complete digital ASIC development flow from architecture and RTL through tapeout and silicon bring-up for next-generation test and measurement instrumentation platforms.

Role type

Senior IC ASIC Design Manager

Builds

Digital ASICs for test and measurement instrumentation

Domain

Semiconductor / Test & Measurement

Required skills

Digital ASIC architecture, RTL development, Physical design (floorplanning, CTS, P&R), Timing closure, Signoff (STA, SI, PI), UVM verification, Project management, Vendor management, Team leadership

Preferred skills

Mixed-signal digital-on-top flows, Package design integration, Silicon bring-up and debug

Technologies

UVM, DFT, CAD tools, Static Timing Analysis, Signal Integrity, Power Integrity, Formal Equivalence, DRC, LVS

Responsibilities

Lead and mentor digital ASIC design, verification, and physical design engineers; Own the end-to-end digital ASIC development flow including synthesis, constraints, and tapeout; Set technical direction for digital IP and full-chip integration; Drive physical design planning and execution; Oversee signoff activities; Partner with product architects to translate requirements into specifications; Coordinate execution across verification, foundry, and packaging teams; Develop project plans and manage risks; Improve design flows and automation; Support silicon bring-up and post-silicon debug.

Seniority

Senior, hands-on IC