VLSI Backend Team Leader
Core
Lead a distributed team of backend engineers to deliver complex RTL-to-GDSII flows for advanced technology nodes (7nm and below), combining 50% hands-on technical work with 50% team management.
Role type
Senior IC VLSI Backend Team Leader
Builds
Production-ready silicon IP for DSPs, AI processors, and hardware accelerators
Domain
Semiconductor / VLSI Physical Design
Deliverable
production ML models
Required skills
RTL-to-GDSII flow ownership, synthesis, place and route (P&R), static timing analysis (STA), physical verification, signoff, TCL scripting, Python scripting, advanced node bring-up, distributed team leadership
Preferred skills
Multi-partition SoC integration, Verilog/SystemVerilog, physical-design flow development, infrastructure development
Technologies
7nm and below process nodes, GDSII, RTL
Responsibilities
Own and drive the complete RTL-to-GDSII flow including synthesis, implementation, timing closure, physical verification, and signoff. Lead, mentor, and develop a distributed team of experienced engineers across Israel and India. Provide hands-on leadership in flow development, advanced technology-node bring-up, integration, and automation. Partner with architecture, frontend, and verification teams to remove technical roadblocks. Support backend convergence of IP with customers.
Seniority
Senior, hands-on IC with management responsibilities