SoC Power Engineer, Annapurna Labs - Cloud Scale Machine Learning
Core
Model and estimate power consumption for machine learning accelerator SoCs (Inferentia and Trainium) from RTL to netlist stages to optimize datacenter AI workloads.
Role type
Senior IC SoC Power Engineer
Builds
Power-efficient machine learning accelerator chips for datacenter AI workloads
Domain
Semiconductor hardware design / Machine Learning Infrastructure
Deliverable
production ML models
Required skills
Power analysis & modeling, Circuit-level chip power understanding, Scripting (Tcl/Perl/Python), Physical Design knowledge, EM/IR analysis, Thermal analysis
Preferred skills
RTL design (System Verilog), EMIR analysis tools (Redhawk/Voltus), Zebu Emulator platform experience, Make automation
Technologies
PrimePower, PowerArtist, Redhawk, Voltus, Zebu, System Verilog, Tcl, Perl, Python
Responsibilities
Perform full chip power analysis & modeling across design stages, Develop and maintain power rollup dashboards, Collaborate with architects and designers to define power reduction best practices, Provide feedback to designers on power optimization, Conduct lab power measurements and correlate with simulations, Model chip-level power consumption using emulation platforms
Seniority
Senior, hands-on IC
