Technology Enablement Engineer(Tessent)
Core
Technical Enablement Engineer driving customer adoption of DFT solutions and delivering technical guidance on SoC DFT methodologies.
Role type
Technical Enablement Engineer (DFT)
Builds
DFT solutions, technical presentations, training materials, white papers, and application notes
Domain
Semiconductor / Electronic Design Automation (EDA) / Design for Test (DFT)
Deliverable
product features
Required skills
SoC DFT methodologies (Scan, ATPG, MBIST), Silicon Diagnosis, VLSI design and testing, ASIC/VLSI verification, technical writing, complex problem decomposition
Preferred skills
DFT architecture development, in-system test (IST), boundary scan, memory/logic BIST, customer-facing technical presentations
Technologies
Scan, ATPG, MBIST, Silicon Diagnosis, VLSI, ASIC
Responsibilities
Drive customer adoption and expansion of DFT solutions; Build and deliver technical presentations, training materials, white papers, and application notes; Resolve complex technical issues and develop innovative solutions; Explain complex technical concepts to a broad audience; Collaborate with application engineers, customers, and internal stakeholders
Seniority
Mid-Senior, hands-on IC
