CareerPlan

Microarchitect and RTL Designer - Compute

Mountain View (HQ) or RemoteFull-time$175k–$400k2026-10-19 → 2026-11-10
No visa sponsorshipU.S. persons only (export control)

Core

Designing micro-architecture and RTL for compute subsystems to accelerate AI/ML workloads.

Role type

Senior IC silicon microarchitect and RTL designer

Builds

High-performance compute blocks (CPUs, GPUs, accelerators) and full-chip silicon designs

Domain

Semiconductor hardware design for AI/ML

Deliverable

production ML models

Required skills

Silicon micro-architecture, RTL design, Bluespec, SystemVerilog, Python, C/C++, design synthesis, timing closure, verification collaboration

Preferred skills

ML datapath design (matmul, systolic arrays), emulation platforms, data movement logic (caches, crossbars)

Responsibilities

Own subsystems from micro-architecture to sign-off, drive design reviews and milestones, collaborate with verification and physical design teams, ensure performance-power-area targets

Seniority

Senior, hands-on IC