Sr. Logic Engineer
Core
Architect, implement, and deliver complex FPGA-based logic for high-speed protocol analysis and test systems, serving aerospace, defense, and industrial markets.
Role type
Staff IC FPGA Logic Engineer (High-Speed Protocols)
Builds
Protocol capture, packet processing, filtering, triggering, traffic generation, and timestamping systems for PCIe, CXL, Ethernet, and USB.
Domain
Hardware engineering, high-speed serial interfaces, FPGA implementation
Required skills
RTL design (SystemVerilog, Verilog, VHDL), high-speed protocol implementation (PCIe, CXL, Ethernet, USB), FPGA architecture, timing closure, CDC/RDC analysis, transceiver integration, verification planning, lab debugging
Preferred skills
PCIe link/transaction layers, CXL.io/cache/mem concepts, Ethernet MAC/PCS/FEC datapaths, USB 3.x/4 protocol logic, Python/Tcl/C++ scripting, formal verification, hardware emulation
Technologies
Xilinx UltraScale+/Versal, Intel Stratix/Agilex, Vivado, SignalTap, SystemVerilog/UVM, PCIe, CXL, Ethernet, USB, DDR4/DDR5, AXI, Avalon
