FPGA Digital Design Engineer
Core
Design and implement FPGA code for DSP algorithms to modulate/demodulate signals and embedded systems interfacing with processors for real-time on-orbit satellite communications.
Role type
Senior IC FPGA Digital Design Engineer
Builds
Custom IP for Kepler satellite digital payloads and next-generation spacecraft communications systems
Domain
Aerospace / Satellite Communications / Digital Signal Processing
Deliverable
production ML models | product features
Required skills
FPGA/RTL design, Verilog/SystemVerilog/VHDL, Xilinx FPGA (Zynq/UltraScale), Timing closure principles, Scripting (Python/Tcl/bash), FPGA tools (Vivado/Quartus), HDL Simulation (ModelSim)
Preferred skills
Coherent digital demodulation (BPSK/QPSK/QAM), Memory mapped interfaces (AXI/Wishbone/Avalon), High-speed transceivers (JESD204B/PCIe/SATA), Linting tools (Questa Sim/Riviera-Pro), Xilinx Versal/RFSoC, PCB design, RF electronics design
Technologies
Xilinx Zynq, Xilinx UltraScale, Xilinx Versal, RFSoC, Vivado, Quartus, ModelSim, Python, Tcl, bash, csh
Responsibilities
Develop custom IP for new features of Kepler satellite digital payloads, Iterate on current DSP and interface designs to improve reliability, Work with IP core vendors to integrate new functionality, Participate in conceptual design studies of new spacecraft
Seniority
Senior, hands-on IC
