Principal Engineer, Test Engineering
Core
Architect comprehensive test solutions and drive testability standards for mixed-signal ICs from early silicon validation through high-volume production, serving wearables, cell phones, industrial, and automotive sectors.
Role type
Principal Test Engineer (Mixed-Signal ICs)
Builds
Reusable test IP, libraries, frameworks, and next-generation ATE capabilities for sensing products
Domain
Semiconductor / Mixed-Signal Test Engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Mixed-signal test development, NPI program leadership, DFT techniques (BIST, scan, boundary scan), statistical process control, PCB design, signal integrity simulation, C/C++/Python/TCL programming, Advantest V93000 platform expertise
Preferred skills
SiGe BiCMOS process technology, automotive quality standards (AEC-Q100), wafer-level testing, probe card design, test data analytics, machine learning for yield enhancement
Technologies
Advantest V93000 (SmarTest 7/8), Cadence, Altium, 93000 PS1600/PS3600, Wave Scale RF
Responsibilities
Architect test strategies for complex mixed-signal products, lead development of innovative test methodologies for sensing products, drive DFT requirements into IC architecture, mentor junior engineers, ensure seamless transfer of test solutions to high-volume OSATs, pioneer implementation of AI/ML techniques for yield enhancement
Seniority
Principal, strategic leader & hands-on IC
