Senior / Staff ATE Test Engineer – Optical Transceiver Silicon
Core
Own production test strategy and execution for mixed-signal ICs (SerDes, TIAs, modulator drivers) in silicon photonics and optical transceivers for AI data centers.
Role type
Senior ATE Test Engineer (Mixed-Signal/High-Speed ICs)
Builds
Production test programs, test hardware (load boards, probe cards), and yield optimization for co-packaged optics and pluggable transceivers.
Domain
Semiconductor manufacturing, Silicon Photonics, Optical Interconnects, AI Infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ATE programming (C/C++, Python), Mixed-signal IC fundamentals, Analog/DC parameter testing, High-speed signal path testing, Test hardware design review, Statistical analysis (JMP, MATLAB, Python), OSAT program management, Failure analysis
Preferred skills
SerDes test (100G/lane+), Silicon photonics/opto-electrical test, DFT (scan, JTAG), STDF/data pipelines, First-generation product line test definition
Technologies
Advantest 93K/T2000, Teradyne UltraFLEX/J750, Eagle, Chroma, Linux, JMP, MATLAB, Python/pandas, BERTs, SMUs, VNAs, Network Analyzers
Responsibilities
Develop and optimize ATE test programs for mixed-signal and high-speed devices; Specify and bring up test hardware including load boards and probe cards; Drive first-silicon bring-up and correlate ATE results with bench/system performance; Own OSAT and test house relationships for multi-site production; Analyze test data to identify yield limiters and lead failure analysis; Mentor junior engineers and establish test standards.
Seniority
Senior, hands-on IC