Engineer, Digital Design Verification
Core
Functional verification of high-speed digital circuits and behavioral modeling of analog/mixed-signal circuits within mixed-signal ICs for data communications and video broadcast.
Role type
Digital Design Verification Engineer
Builds
Mixed-signal ICs for data communications and video broadcast
Domain
Semiconductor / Mixed-signal IC design
Required skills
Constrained random verification (UVM/OVM/AVM/VMM), SystemVerilog, Python/TCL/Perl/C, digital verification methods, analog circuit modeling, project planning, technical documentation
Preferred skills
Object-oriented programming, Unix/Linux proficiency
Technologies
UVM, OVM, AVM, VMM, SystemVerilog, Python, TCL, Perl, C, Linux
Responsibilities
Functional verification of high-speed digital circuits using constrained random verification; Behavioral modeling of analog circuits and mixed-level simulation; Create product and technical documents; Prepare project plans and schedules; Provide technical guidance to verification tasks; Collaborate with analog, firmware, system, and marketing engineers; Support validation and qualification of end products; Provide leadership and mentoring to other engineers; Continual improvement of design verification methodology
Seniority
Mid-level, hands-on IC
