Sr. Manager Verification
Core
Lead and manage a team of verification engineers to ensure high-quality, timely delivery of digital and mixed-signal integrated circuit designs.
Role type
Senior Manager, Digital/Mixed-Signal IC Verification
Builds
Production-ready digital and mixed-signal integrated circuits
Domain
Semiconductor / Integrated Circuit Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (IC designs)
Required skills
System Verilog, UVM methodology, RTL verification, gate-level verification, analog/mixed-signal (AMS) verification, Python scripting, Perl scripting, EDA tools (Synopsys, Cadence, Siemens), hardware protocols (I2C, I3C, SPI, MIPI), team leadership, project management, coverage analysis, test strategy definition
Preferred skills
Analog block behavioral modelling, signal processing knowledge, consumer/ITA market circuit development experience
Technologies
System Verilog, UVM, Python, Perl, Synopsys, Cadence, Siemens, I2C, I3C, SPI, MIPI
Responsibilities
Lead, supervise, and mentor verification engineers; Drive definition and implementation of comprehensive verification plans and test strategies; Manage design and implementation of complex testbenches; Track and report verification progress using quantitative metrics; Interface with system, digital hardware, embedded firmware, and cross-functional teams; Drive adoption of advanced verification methodologies
Seniority
Senior, hands-on IC