Package Design Engineer
Core
Leads the complete design flow of advanced microelectronic packages, translating customer needs into technical specifications and ensuring successful routing and design reviews.
Role type
Package Design Engineer
Builds
Organic and ceramic multi-layers microelectronics packages (BGA, PGA, CLCC, CQFP, WLCSP) for imaging sensors and high-performance semiconductors.
Domain
Semiconductor packaging and microelectronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
microelectronics packaging design, specification definition, vendor management, electrical/thermal/mechanical simulation, DRC checks, routing implementation, layout design for signal/power integrity, mechanical design
Preferred skills
imaging package experience, assembly house technical management, electrical modelization (parasitic extraction), thermal simulation, system and sub-system development
Technologies
Cadence APD, Solid Works, Cadence Xtract IM, Spice, Ansys, Ansys Workbench
Responsibilities
Identify customer needs and devise packaging solutions, interact with packaging manufacturers to obtain solutions and quotes, implement design and routing per constraints, conduct electrical/thermal/mechanical simulations, perform DRC checks and design reviews, guide technical reviews with vendors, monitor emerging packaging technologies, lead R&D or continuous improvement initiatives
Seniority
Mid-level IC engineer
