Principal Modem SOC Design Engineer - Terawave
Core
Technical design leader for the TeraWave satellite communication System on Chip (SOC), leading RTL design and microarchitecture definition for modem subsystems.
Role type
Principal IC ASIC/SOC design engineer (modem)
Builds
TeraWave satellite communication System on Chip (SOC) for enterprise, data center, and government users
Domain
Space-based connectivity / Satellite communications
Deliverable
production ML models | product features
Required skills
RTL design (Verilog/System Verilog), microarchitecture definition, Arm compute subsystem design, AXI interconnect, SRAM controllers, high-speed memory interfaces (LPDDR4/5/6), Gigabit Ethernet interfaces, SOC-level integration (bus fabric, clock, reset), Arm CoreSight debug, synthesis, timing closure
Preferred skills
Modem datapath/PHY IP design, signal processing hardware (filters, FFTs, equalizers, FEC)
Responsibilities
Lead RTL design for modem SOC and subsystems; Define microarchitecture based on system specifications; Develop Arm compute subsystem logic; Integrate debug subsystem components; Drive subsystem and SOC-level integration; Serve as technical interface to system/software architecture teams; Collaborate with performance modeling and FPGA prototyping teams
Seniority
Principal, hands-on IC with technical leadership scope
