Design Engineer II
Core
Develop and enhance functional verification environments for Cadence's Memory Controller IP, ensuring clean customer configurations and high code coverage.
Role type
IC verification engineer (memory controller)
Builds
Functional verification environments and test plans for Memory Controller IP
Domain
Semiconductor / Digital Logic Verification
Required skills
UVM environment development, functional verification fundamentals, test plan generation, environment planning, regression testing, AXI protocol knowledge, CHI-E protocol knowledge
Preferred skills
DDR Memory verification, Memory controller verification
Technologies
UVM, AXI, CHI-E, DDR
Responsibilities
Add new features to the existing functional verification environment, ensure clean customer configurations during verification regressions, support customers with verification environment issues, maintain functional and code coverage metrics, ensure designs meet team quality requirements
