RTL2GDS IC Sr. Principal Design Engineer
Core
Sr. Principal Design Engineer driving Pre-sales and Post-sales technical support for Cadence Digital IC products at advanced nodes, solving Digital Implementation and Signoff problems for customers.
Role type
Sr. Principal Design Engineer (Pre-sales/Post-sales)
Builds
Cadence Digital IC products (Synthesis, Place and Route, Design Closure, timing/power signoff)
Domain
Semiconductor / EDA / Digital IC Design
Deliverable
client delivery
Required skills
Digital Implementation & Signoff expertise, Place & Route (Innovus, ICC2, Fusion Compiler), Synthesis (Genus, RTL Compiler, Design Compiler), STA debugging, Tcl/Perl/Shell scripting, ASIC design process knowledge
Preferred skills
Low power analysis, Clock design/analysis, 7nm/5nm technology node experience
Technologies
Innovus, ICC2, Fusion Compiler, Genus, RTL Compiler, Design Compiler, STA tools
Responsibilities
Provide technical support for Digital Design Implementation & Signoff, Guide customers on utilizing Cadence technologies, Conduct technical presentations and product demonstrations, Drive technical evaluations/benchmarks, Work with R&D to enhance tools and methodologies, Amend flows using Tcl/Perl to meet objectives, Provide mentorship to junior engineers
Seniority
Sr. Principal, hands-on IC with mentorship
