Lead Application Engineer
Core
Lead Application Engineer specializing in AI-assisted verification solutions for digital design, focusing on UVM testbench generation, simulation flow automation, and customer technical support.
Role type
Senior IC application engineer (verification & AI)
Builds
AI-assisted verification workflows, reusable UVM environments, and technical reference flows for IP, subsystem, and SoC designs
Domain
Semiconductor EDA / Digital Verification / AI
Deliverable
production ML models
Required skills
SystemVerilog, UVM, Python, TCL, constrained-random verification, coverage-driven verification, simulation debugging, log/waveform analysis, customer engagement
Preferred skills
LLM APIs, prompt engineering, RAG, vector databases, agent-based workflows, cloud deployment, AMBA/AXI/PCIe protocols, low-power verification
Technologies
Xcelium, Verisium, Python, TCL, Shell, Perl, LLM APIs, Vector Databases
Responsibilities
Engage with customers to identify AI-assisted verification use cases; Develop and optimize SystemVerilog/UVM-based verification environments; Develop reusable prompts, agents, and AI-assisted workflows; Conduct technical evaluations, benchmarks, and customer training; Troubleshoot UVM, simulation, and AI integration issues; Collaborate with R&D and support teams; Develop technical collateral and reference flows
