Lead Application Engineer
Core
Lead Application Engineer specializing in AI-assisted verification solutions for digital design, IP, and SoC verification challenges.
Role type
Senior IC Application Engineer (AI-assisted Verification)
Builds
AI-assisted verification workflows, reusable UVM environments, and technical collateral for customer applications.
Domain
Electronic Design Automation (EDA) / Digital Verification / AI Integration
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, constrained-random verification, coverage-driven verification, Python scripting, TCL, root-cause analysis, verification flow automation
Preferred skills
LLM APIs, prompt engineering, RAG, vector databases, agent-based workflows, cloud deployment, AMBA/AXI/PCIe protocol knowledge
Technologies
Xcelium, Verisium, Python, TCL, Shell, Perl, SystemVerilog, UVM
Responsibilities
Engage with customers to identify AI-assisted verification use cases; Develop and optimize SystemVerilog/UVM-based verification environments; Develop reusable prompts, agents, and AI-assisted workflows; Conduct technical evaluations, benchmarks, and customer training; Troubleshoot UVM, simulation, and AI integration issues; Develop technical collateral and reference flows.
Seniority
Senior, hands-on IC
