Principal Product Engineer - Memory IP
Core
Supporting pre-silicon integration, system integration, QA testing, and post-silicon bringup for memory subsystem products (Controller + PHY) while resolving complex application issues.
Role type
Principal Product Engineer (Memory IP)
Builds
Memory subsystem products (Controller + PHY) for customers
Domain
Semiconductor / Memory IP / SoC Integration
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6 IP knowledge, Verilog RTL design, gate-level verification, synthesis, static timing analysis, DFT flows, package/board design review, SI/PI review participation
Preferred skills
Memory PHY and DSP architecture experience, embedded microcontroller firmware, scripting for AI workflows
Technologies
Verilog, DDR5, HBM3, GDDR6, LPDDR5
Responsibilities
Supporting pre-silicon integration and usage of memory subsystem products; assisting customers with RTL and gate-level simulations; supporting timing closure and physical integration; participating in development of product documentation and checklists; supporting post-silicon bringup and production test activities
Seniority
Senior, hands-on IC
