Senior Principal Hardware Engineer
Core
Drive solutions for complex hardware designs from synthesis to GDS tape-out, focusing on physical design, floorplanning, clock construction, and signoff closure.
Role type
Senior Principal Hardware Engineer (Physical Design)
Builds
High-performance computing (HPC) devices and emulation-acceleration system platforms
Domain
Semiconductor hardware design and EDA tools
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
logic synthesis, floorplanning, place and route (PNR), clock construction, timing analysis, physical verification, IR/EM analysis, advanced process node expertise, SoC ownership
Preferred skills
scripting languages (PERL, Python, TCL, Shell), cross-functional collaboration
Technologies
EDA tools, advanced process nodes, proprietary Boolean processor architecture
Responsibilities
Drive solutions in logic synthesis, floorplan, place and route (PNR), and clock construction; Optimize power, performance, and area to meet design requirements; Close designs adhering to timing, power, IR/EM, and foundry specifications; Provide continuous improvement to existing tools, flows, and methodologies; Collaborate with cross-functional teams including RTL, DFT, and Architecture teams.
Seniority
Senior Principal, hands-on IC with strategy contribution
