Senior Principal Design Engineer
Core
Lead physical implementation of high-speed interface PHY IP and optimize design flows for product projects.
Role type
Senior Principal Design Engineer (Physical Implementation)
Builds
High-speed interface PHY IP and optimized design flows
Domain
Semiconductor / Digital Physical Design
Required skills
Floorplan, CTS, STA, Physical verification, Power analysis, Circuit theory, Electronics, Physics, Scripting (Perl, C shell, TCL, Makefile, Python), EDA tools (Innovus, ICC, Calibre, Tempus, PrimeTime)
Preferred skills
Advanced design methodology, Cutting-edge process node knowledge
Responsibilities
Develop scripts/tools to enhance PD design flow, Solve design issues and provide verification flows, Analyze and summarize PPA optimization methodologies, Implement optimal design parameters and flows
Seniority
Senior, hands-on IC
