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Principal Product Engineer

SAN JOSE, US💼 Full-time💰 $140,000–$140,000🗓 2026-09-23 → 2026-09-26

Core

Drive definition, early deployment, and adoption of Cadence Virtuoso Heterogeneous Integration technologies for 3D IC, heterogeneous integration, and advanced packaging.

Role type

Principal Product Engineer (EDA/Physical Implementation)

Builds

End-to-end system design implementation flows and customer-ready capabilities for semiconductor physical implementation.

Domain

Semiconductor EDA, 3D IC, Heterogeneous Integration, Advanced Packaging

Deliverable

product features

Required skills

Semiconductor design, physical implementation, advanced packaging, Cadence Virtuoso platform, custom IC design flows, Product Requirement Specifications (PRS), technical use cases, cross-functional collaboration, bug/enhancement prioritization, product launches

Preferred skills

Software product definition, validation, technical marketing, co-design flows (silicon-package-board), Cadence Allegro Package Designer Plus (APD+), SKILL language or interpreted languages

Technologies

Cadence Virtuoso, Cadence Allegro Package Designer Plus (APD+), SKILL

Responsibilities

Partner with semiconductor customers to translate co-design challenges into product specifications; Produce PRS, technical use cases, and support R&D; Collaborate with R&D, Product Management, and Field teams to deliver capabilities; Create demonstration collateral and enablement materials; Troubleshoot design-flow issues and drive prioritization; Support product launches and industry events.

Seniority

Principal, hands-on IC with strategic customer focus

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