RTL2GDS Principal Product Engineer
Core
Senior technical authority bridging R&D and strategic customers to drive technical excellence in Cadence's digital implementation product portfolio for advanced process nodes.
Role type
Principal Product Engineer (Senior IC)
Builds
Cadence Innovus, Tempus, and Genus digital implementation tools
Domain
Semiconductor EDA / Physical Design / ASIC Implementation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL-to-GDSII flow expertise, PPA optimization, static timing analysis, hierarchical design methodologies, low-power design (UPF), Tcl/Perl/Python/Shell scripting, customer engagement, technical mentorship
Preferred skills
Cadence Pegasus familiarity, advanced routing constraints (SADP/EUV), automotive/AI/HPC domain experience, Joules/Voltus knowledge
Technologies
Cadence Innovus, Tempus, Genus, Pegasus, Tcl, Perl, Python, Shell, IEEE 1801 UPF
Responsibilities
Own complex customer escalations, lead advanced design benchmarks for 7nm/5nm/3nm nodes, partner with R&D on algorithmic improvements, define reference methodologies, mentor engineers, drive automation initiatives, represent company in technical reviews, influence product roadmap
Seniority
Principal, hands-on IC with strategic influence
