Sr Principal Design Engineer
Core
Designing high-speed Serdes and memory interface circuits for advanced electronic products.
Role type
Sr Principal Design Engineer (Analog/Interface)
Builds
High-performance IP blocks for chips, boards, and systems
Domain
Semiconductor design, high-speed interfaces, analog circuits
Deliverable
production ML models | product features | infrastructure
Required skills
High-speed Serdes design, Memory interface circuits (PCIe, GDDR, LPDDR), Analog Design, I/O Design, ESD/Reliability/SI/PI knowledge, Cross-functional leadership, Mentoring
Preferred skills
Experience with cutting-edge technology nodes (16nm, 10nm, 12nm, 7nm)
Technologies
PCIe Gen3/4/5/6, GDDR, LPDDR, PLL, Clocking, Datapath
Responsibilities
Design high-speed Serdes and memory interface circuits, Lead complex IP development, Manage cross-functional dependencies, Mentor junior engineers
Seniority
Principal, hands-on IC with leadership
