Principal Design Engineer
Core
Develop and verify hardware and software safety mechanisms for configurable embedded processors (Xtensa) to meet automotive safety goals.
Role type
Principal Design Engineer (Functional Safety Verification)
Builds
Simulation/emulation test benches, assertion checkers, coverage monitors, and fault simulation environments for embedded processors.
Domain
Semiconductor / Embedded Systems / Automotive Safety
Required skills
Design verification, Computer architecture, Verilog, SystemVerilog, Functional coverage, C programming, Assembly language, Perl/Unix scripting, ISO 26262 safety concepts, Fault simulation, Debugging netlist/gate level simulation
Preferred skills
Leading small teams, MISRA coding guidelines, OS understanding
Technologies
Verilog, SystemVerilog, Perl, Unix shell, C, Assembly
Responsibilities
Implement simulation or emulation test benches, assembly/C language diagnostics, assertion checkers, and coverage monitors; Assist with fault simulation and analyzing coverage information; Develop and deliver functional safety work products including documentation for product safety certification; Work closely with RTL, EDA, and Functional Safety teams.
Seniority
Senior, hands-on IC with team leadership (via careerplan.io/jobs/R48322-principal-design-engineer-at-cadence)
