Senior AMS DV Engineer
Core
Senior Analog Mixed Signal (AMS) Design Verification Engineer developing new product solutions for portable consumer applications.
Role type
Senior IC Design Verification Engineer (AMS)
Builds
SOC solutions for portable consumer applications
Domain
Semiconductor, Analog Mixed Signal, Consumer Electronics
Required skills
AMS verification, UVM, Cadence-based flow, mixed signal simulators, SVRNM/VerilogAMS, OOP, scripting (Python/C/Perl), debugging
Preferred skills
Digital Mixed Signal Verification (DMS), limited travel
Technologies
UVM, Cadence AMS, SVRNM, VerilogAMS, Jira, Python, C, Perl
Responsibilities
Contribute to verification strategy and methodology improvement, develop directed tests or reuse constrained random UVM testcases, code/generate SVRNM models for analog blocks, file and track bugs in Jira, document results and review with team
Seniority
Senior, hands-on IC
