Associate Design Verification Engineer
Core
Develop test benches and perform design verification of new digital, analog, and mixed-signal products prior to tape-out.
Role type
Associate Design Verification Engineer
Builds
Mixed-signal products for autonomous vehicles, drones, factories, augmented reality, and remote healthcare
Domain
Semiconductor / Mixed-signal and digital design
Required skills
SystemVerilog, UVM, Verilog RTL, Python/Perl/TCL scripting, I2C/SPI/UART protocols, simulation debugging
Preferred skills
Electrical Engineering degree, 0-2 years experience
Technologies
SystemVerilog, UVM, Python, Perl, TCL, Verilog, I2C, SPI, UART
Responsibilities
Develop and execute basic test benches, Create and maintain basic test environments, Conduct code coverage analysis, Debug simulation failures, Support verification planning and documentation, Collaborate with design teams to understand requirements
Seniority
Entry-level, new graduates welcome
