Principal Engineer, Digital IC Design and Architecture
Core
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs for next-generation automotive connectivity solutions.
Role type
Principal IC Design and Architecture Engineer
Builds
High-speed SerDes ICs and OpenGMSL connectivity solutions for automotive, industrial, and medical applications
Domain
Semiconductor / Automotive Electronics / High-Speed Digital Design
Required skills
Digital architecture and design, Verilog/SystemVerilog, SerDes transceiver architectures, RTL design and implementation, block-level verification, CDC analysis, timing closure, mixed-signal integration, silicon bring-up and debug, technical standards authoring
Preferred skills
High-speed SerDes standards (Ethernet, USB, PCIe, DisplayPort, CSI/DSI, HDMI), behavioral modeling, DSP design with Matlab, team leadership
Technologies
Verilog, SystemVerilog, Matlab, SerDes, OpenGMSL
Responsibilities
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs; Develop new architectures and advance OpenGMSL technical standards; Write detailed block and subsystem-level specifications; Use Verilog and SystemVerilog to design digital blocks and top-level designs; Develop block-level testbenches and collaborate on full-chip verification; Perform linting, CDC analysis, and power analysis; Communicate with mixed-signal designers for simulations; Prepare technical documentation and lead design reviews; Support silicon bring-up, characterization, and debug; Collaborate across analog, digital, verification, and product teams; Provide technical leadership for complex SerDes subsystems
Seniority
Principal, hands-on IC design with strategic architecture and standards leadership
