Mixed Signal Design Verification Engineer
Core
Develop analog circuit models and system models to verify functionality and connectivity within mixed-signal SoC integrated circuits for advanced wireless applications.
Role type
Mixed Signal Design Verification Engineer
Builds
Mixed-signal system-on-chip (SoC) integrated circuits for advanced wireless applications
Domain
Semiconductor / Mixed-Signal IC Design
Required skills
SystemVerilog, VerilogAMS, SystemC, Perl, Python, C/C++, analog circuit modeling, pre-silicon verification
Preferred skills
MATLAB, RTL modeling, UVM, RF wireless communication systems, EDA tools (Virtuoso, Incisive, Spectre)
Technologies
SystemVerilog, VerilogAMS, SystemC, Perl, Python, C/C++, Virtuoso, Incisive, Spectre, UVM
Responsibilities
Develop analog and system models for verification, implement mixed-signal simulation testbenches, collaborate with design teams to resolve verification issues
Seniority
Mid-level, hands-on IC engineer
