Director, Design verification engineering
Core
Define verification strategy and architecture for complex Edge AI based digital designs, leading a team to deliver 'Zero Defect' chips.
Role type
Director, Design Verification Engineering
Builds
Complex digital SoC designs for Edge AI applications
Domain
Semiconductor / Digital SoC Design / Edge AI
Deliverable
production ML models
Required skills
SystemVerilog, UVM, Verification Strategy & Architecture, Digital SoC Design (Processor, Interconnect, Protocols), Advanced Debugging (RTL/System/GLS), Technical Leadership, Strategic Problem Solving
Preferred skills
Master's or PhD in EE/CE, 15+ years verification experience, Team leadership experience
Technologies
SystemVerilog, UVM, AHB, AXI
Responsibilities
Define verification strategy and architecture for Edge AI designs; Pioneer advanced verification methodologies; Lead and scale a verification team; Drive cross-organizational verification decisions; Resolve complex verification issues; Mentor verification engineers; Represent company in industry forums and standards; Establish verification metrics and quality standards
Seniority
Director, strategic leadership with hands-on technical expertise