CareerPlan

HW Verification Engineering Lead

Phoenix Building, Bangalore, IndiaFull-time2026-11-03 → 2026-11-10

Core

Lead IP Verification / Pre-Silicon Validation for custom hardware IP in camera, multimedia, and display pipelines for smartphones.

Role type

Senior IC hardware verification lead (IP lifecycle & validation)

Builds

Custom hardware IP blocks for next-generation smartphone product lines

Domain

Consumer electronics / Semiconductor / Hardware IP

Deliverable

production ML models

Required skills

System Verilog, UVM/OVM, SystemC, C, Python, FPGA prototyping, ASIC validation, PCIe/USB/DDR/ARM/RISC-V integration, Low Power Implementation (UPF/CPF), Timing Analysis, Clock Domain Crossing (CDC), AI tool usage for IP development

Preferred skills

NPU subsystem knowledge, AI tool exploration (Claude), Cross-functional leadership

Technologies

System Verilog, UVM, OVM, SystemC, C, Python, FPGA, ASIC, PCIe, USB, DDR, ARM, RISC-V, MIPI, UPF, CPF

Responsibilities

Oversee end-to-end IP lifecycle and advanced verification; Define and implement best-in-class engineering practices and design flows; Mentor team to ensure zero-bug silicon delivery; Integrate complex sub-systems and validate custom HW IP blocks.

Seniority

Senior, hands-on IC with leadership