CareerPlan

Product Development Engineer

San Jose, California, United StatesFull-time$106k–$154k2026-11-03 → 2026-11-10
No visa sponsorship

Core

Develop and implement Design for Test (DFT) strategies, test content flows, and validation for FPGAs to ensure manufacturing quality and defect screening.

Role type

Product Development Engineer (DFT/Manufacturing Test)

Builds

Manufacturing test content flows, scripts, and test patterns for FPGAs

Domain

Semiconductor / FPGA Manufacturing / Digital Design

Required skills

DFT methodologies (scan insertion, BIST, test compression), RTL design and verification flows, fault grading and yield analysis, Python/Perl/TCL scripting, semiconductor manufacturing test processes, digital/analog circuit fundamentals

Preferred skills

Tessent MBIST flows and memory repair schemes, post-silicon pattern conversion and ATE bring-up

Technologies

TessentIJTAG, Tessent MemoryBIST, FastScan, Tessent Shell, Python, Perl, TCL

Responsibilities

Develop DFT strategies including scan insertion and BIST; Collaborate with RTL teams to embed testability features; Define test plans and fault models; Perform pre-silicon test pattern simulation; Analyze test results and debug silicon failures; Optimize test time and cost; Drive test hole closure for customer returns

Seniority

Mid-level IC Engineer (3+ years experience)