Senior Lead Engineer - Design and Architecture
Core
Define system, subsystem, and microarchitecture for complex SoC, ASIC, and FPGA-adjacent platforms, focusing on high-performance interconnect, data movement, memory hierarchy, and scalable compute or networking subsystems.
Role type
Senior individual-contributor architect and design leader
Builds
Scalable, performant, and manufacturable silicon solutions for AI, cloud, networking, and edge applications
Domain
Semiconductor / ASIC / SoC / FPGA / High-performance interconnect
Required skills
ASIC/SoC architecture, high-bandwidth interconnect, memory systems, networking silicon, system architecture, microarchitecture, RTL design, verification, emulation, physical design, cross-functional leadership, technical tradeoffs
Preferred skills
Advanced-node SoC/ASIC delivery, Network-on-Chip/fabric solutions, memory systems/cache hierarchy, RTL/verification methodologies, architecture modeling, Python automation, heterogeneous SoC platforms
Technologies
SystemVerilog, simulation, formal verification, emulation, equivalence checking, synthesis, static timing, HBM/DDR, Python
Responsibilities
Define system and microarchitecture for complex SoC/ASIC platforms; Lead architecture exploration and make tradeoffs across performance, power, area, and cost; Develop architectural specifications and implementation plans; Own key design decisions through the full silicon lifecycle; Provide hands-on leadership for on-chip networks and memory subsystems; Drive cross-functional resolution of complex technical issues; Establish scalable design and verification methodologies; Mentor senior engineers and influence engineering direction; Engage with IP, EDA, and foundry partners
Seniority
Senior, hands-on IC with technical leadership
