Principal SerDes System/DSP Design Engineer
Core
Lead the architecture, design, and validation of high-speed serial transceivers (electrical SerDes and optical IMDD) for next-generation high-capacity networks.
Role type
Principal SerDes System/DSP Design Engineer
Builds
High-speed electrical/optical-IMDD transceiver solutions for data communication systems
Domain
High-speed optical communications and digital signal processing
Deliverable
production ML models | product features
Required skills
SerDes system-level evaluation and modeling, control theory, digital signal processing (DSP), adaptive equalization, maximum likelihood sequence detection (MLSD), timing recovery, FEC performance modeling, MATLAB/Python/C++
Preferred skills
Optical IMDD systems knowledge, lab bring-up and characterization of SerDes links, industry standards (PCIe, IEEE, Ethernet, OIF)
Technologies
MATLAB, Python, C/C++
Responsibilities
Lead design and development of electrical SerDes DSP architectures; Perform system-level evaluation, modeling, and performance analysis; Develop algorithms for adaptive equalization, MLSD, and timing recovery; Integrate control theory and DSP designs into hardware; Collaborate with cross-functional teams to optimize performance; Conduct design trade-offs for power and area targets; Analyze channel models and analog impairments; Provide system-level specifications for sub-blocks (DAC, ADC, AFE, PLL); Evaluate and model IMDD optical links; Document design specifications and contribute to IP generation.
Seniority
Principal, hands-on IC with strategy & mentorship