FPGA Silicon Design Verification Engineer
Core
Develop and execute pre-silicon verification plans for Design-for-Test (DFT) and test-related logic in complex SoC and IP designs on flagship FPGAs.
Role type
Senior IC design verification engineer (DFT/SoC)
Builds
Pre-silicon verification environments and testbenches for FPGA SoC and IP
Domain
Semiconductor hardware design (FPGA/SoC/DFT)
Required skills
SystemVerilog, UVM, DFT architectures (Scan, MBIST, LBIST, JTAG, Boundary Scan), simulation debugging, coverage-driven verification, regression automation
Preferred skills
SoC-level verification, ATPG concepts, low-power verification, scripting (Python/Perl/Tcl), CI/CD pipelines, mentoring
Technologies
VCS, Xcelium, Questa, Git
Responsibilities
Develop verification plans for DFT features; Create SystemVerilog/UVM testbenches; Debug RTL and testbench issues; Analyze simulation failures; Track verification metrics and coverage; Collaborate with design and validation teams
Seniority
Senior, hands-on IC (via careerplan.io/jobs/R02827-fpga-silicon-design-verification-engineer-at-altera)
