Signal Integrity/ Power Integrity Engineer

Altera

Haifa, IsraelFull-time2026-07-14 → 2026-11-14

Core

Support the integration of mixed-signal and high-speed SERDES IPs into full-chip silicon design, packages, and PCBs.

Role type

Junior Signal and Power Integrity Engineer

Builds

High-speed SERDES IPs, silicon packages, and PCBs

Domain

Semiconductor / High-speed digital design

Required skills

Electromagnetic and waves theory, Signal Integrity (SI), Power Integrity (PI), ASIC package design, High-speed routing, PDN design, Oscilloscope usage, TDR/VNA analysis, Mixed-signal simulation

Preferred skills

None stated

Technologies

SERDES, FPGA, CPLD, TDR, VNA

Responsibilities

SERDES IP system simulation support, SERDES IP integration support, Package and PCB design verification, Mixed-signal and channel simulation, Design quality and optimization, Cross-team collaboration

Seniority

Junior, early-career

About Altera

At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets including AI, cloud, networking, communications, automotive, and edge computing. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape