DFT Engineer
Core
DFT Engineer responsible for MBIST, scan insertion, ATPG, ATE pattern development, and yield analysis for silicon bring-up.
Role type
Senior IC DFT Engineer
Builds
Production chips with embedded DFT infrastructure
Domain
Semiconductor / Digital Logic Design
Required skills
DFT techniques, MBIST architecture, scan insertion, ATPG, RTL lint checking, silicon debugging, Perl scripting, digital logic fundamentals, Mentor Tessent/Synopsys tools
Preferred skills
STA constraint development in DFT modes
Responsibilities
Develop ATE patterns and manage hand-off processes, perform block and chip-level DFT implementation, execute DFT lint checking and simulation, collaborate with design and verification teams during DFT design phase, engage with cross-functional teams during silicon bring-up
Seniority
Senior, hands-on IC
