ASIC Design Engineer
Core
Physical design implementation of large-scale custom CMOS ASICs for AI, Cellular, Networking, Computing, and Storage products.
Role type
ASIC Design Engineer (Physical Design)
Builds
Custom silicon solutions for high-performance computing and networking products
Domain
Semiconductor / VLSI / ASIC Design
Required skills
VLSI design, CMOS logic, digital circuit fundamentals, floorplanning, placement, clock tree synthesis, routing, timing closure, physical verification (DRC/LVS), UNIX/Linux, TCL
Preferred skills
Python, Perl, Cadence Innovus, Synopsys ICC2, PrimeTime, power planning, IR/EM checks, post-route optimization
Technologies
Cadence Innovus, Synopsys ICC2, PrimeTime, UNIX/Linux
Responsibilities
Contribute to physical design implementation of large-scale ASICs, support floorplanning and routing, collaborate on block-level integration and timing analysis, utilize EDA tools for design and verification, contribute to design flow improvements, assist in timing and power analysis, interface with customers and stakeholders
Seniority
Mid-level IC Engineer
