Design Implementation Engineer
Core
Design Implementation Engineer responsible for place and route, timing closure, and physical verification to achieve PPA metrics and right-first-time silicon.
Role type
Senior IC Design Implementation Engineer (ASIC/SoC)
Builds
ASIC/SoC chips for Broadcom
Domain
Semiconductor / VLSI Design
Required skills
floor-planning, partitioning, placement, clock tree synthesis, routing, timing analysis, timing closure, physical verification (LVS/DRC), ECO implementation, constraints development and validation, formal verification, tapeout experience
Preferred skills
7nm and lower technology tapeout, Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime
Technologies
Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime
Responsibilities
Drive tools and methodologies to achieve desired PPA metrics; implement timing and functional ECOs; perform equivalence checks and power optimization; conduct physical verification and timing closure.
Seniority
Senior, hands-on IC
