Die-to-Die (D2D) Applications Engineer
Core
Primary technical resource for integrating and deploying proprietary Die-to-Die (D2D) PHY IP in silicon, bridging hardware, firmware, and software for customers developing ASICs for cloud computing AI engines, supercomputers, networking, and wireless solutions.
Role type
Senior IC applications engineer (D2D PHY IP)
Builds
ASICs for cloud computing AI engines, supercomputers, networking, and advanced wireless solutions
Domain
Semiconductor / High-speed SerDes / Chiplet interconnects
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Verilog/RTL debugging, cross-domain root cause analysis (RTL/firmware/hardware), digital design fundamentals, chip-level interface protocols, scripting (Python/Ruby/Tcl), embedded firmware debug (C/C++)
Preferred skills
D2D PHY IP experience, silicon bring-up, lab debug equipment (oscilloscopes/logic analyzers), DFT/ATE test development
Technologies
Verilog, RTL, Python, Ruby, Tcl, C/C++, DFT, ATE
Responsibilities
Debug Verilog/RTL simulation issues, support DFT/ATE production test development, assist with silicon bring-up and characterization, diagnose cross-layer issues (RTL/firmware/system), create debug guides and application notes, participate in customer-facing technical discussions
Seniority
Senior, hands-on IC
