DFT Engineer
Core
Define chip-level DFT architecture and implement test schemes to ensure manufacturability and yield.
Role type
DFT Engineer
Builds
Integrated circuits (chips) with embedded testability features
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DFT architecture definition, scan implementation, boundary scan, Memory BIST, Logic BIST, simulation-based verification, static timing analysis, ATE bring-up and debugging
Preferred skills
null
Technologies
null
Responsibilities
Participate in chip level DFT architecture definition; Implement basic DFT schemes including scan, boundary scan, Mem BIST and Logic BIST; Verify all DFT logics and test patterns with simulation; Perform test modes static timing analysis; Participate in ATE bring-up and debug the DFT patterns on ATE.
Seniority
null
