Emulation Engineer
Core
Develop and execute pre-silicon test plans and verification strategies for high-performance networking ASICs using emulation platforms to validate switch features before silicon fabrication.
Role type
Senior IC emulation engineer (networking ASICs)
Builds
Pre-silicon validation environments and test methodologies for networking switch chips
Domain
Networking semiconductors / Hardware emulation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Verilog/SystemVerilog, C/C++, Tcl, Python, hardware emulation platforms (Zebu/Palladium), DPI transactors, assertions, coverage methodologies, root cause analysis, high-speed protocols (PCIe/Ethernet)
Preferred skills
Simulation background, cross-functional collaboration with architecture and design teams
Technologies
Zebu, Palladium, Tcl, ITcl, Python, C/C++, Verilog, SystemVerilog
Responsibilities
Define and execute comprehensive pre-silicon test plans; Develop sub-system and chip-level tests; Build and synthesize Verilog/SystemVerilog-based models; Perform block-, sub-system-, and chip/system-level debugging; Support failure analysis of customer-returned parts; Collaborate with post-silicon teams to correlate validation results; Develop and optimize automation scripts; Create reusable synthesizable design blocks and libraries; Build and maintain robust emulation environments
Seniority
Senior, hands-on IC
