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Package Design Engineer

USA-CA San Jose Innovation Drive💼 Full-time💰 $141,300–$141,300🗓 2026-06-01 → 2026-09-29

Core

Designing complex flip-chip-BGA packages for high-performance ASICs serving AI, networking, HPC, and 5G base stations, focusing on high-speed SerDes and very-high-power delivery.

Role type

Senior IC package-design engineer

Builds

High-performance package structures for ASICs

Domain

Semiconductor manufacturing / High-speed electronics

Required skills

flip-chip-BGA package design, signal integrity, power integrity, manufacturability, reliability, thermal management, project management, physical design (layout)

Preferred skills

Cadence APD (Allegro), Cadence SKILL, design automation coding

Technologies

Cadence APD, Cadence SKILL, Allegro

Responsibilities

Overall design responsibility for ASIC package designs including signal, power, manufacturability, reliability, and thermal aspects; Package Design of critical structures for SerDes, ADC/DAC, DDR; Schedule, prioritize, & track work across 2+ projects simultaneously; General flip-chip BGA package design & engineering; Project management and customer interface for design projects; Contribute to efficiency improvements through process development, automation, and documentation; Physical design (layout)

Seniority

Senior, hands-on IC

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