ASIC Verification Engineer to our R&D site in Stockholm
Core
ASIC Verification Engineer developing and verifying hardware modules for the ARTPEC SoC chip used in Axis surveillance cameras.
Role type
ASIC Verification Engineer
Builds
Hardware modules for the ARTPEC SoC chip
Domain
Semiconductor / ASIC Design / Surveillance Technology
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SoC-level verification, software-driven verification, interconnect fabrics/protocols, SystemVerilog, UVM, digital design concepts (RTL, FSMs, pipelines, clocking, resets), Python, C, C++, SystemC
Preferred skills
formal verification, assertion-based methodologies, low-power verification (UPF/CPF), Transaction-Level Modeling (TLM), protocols (AXI, PCIe, Ethernet, DDR), gate-level simulation, post-silicon validation, embedded systems
Technologies
SystemVerilog, UVM, Python, C, C++, SystemC, UPF, CPF, AXI, PCIe, Ethernet, DDR
Responsibilities
Design, develop, implement, integrate, and verify hardware modules for the ARTPEC SoC chip; perform SoC-level verification using software-driven methods and constrained random verification; collaborate on continuous improvement and new methodologies.
Seniority
Mid-level to Senior, hands-on IC
