EVA Design Verification Engineer, Senior - Cork, Ireland
Core
Architect, design, and implement testbenches to verify Computer Vision hardware IP and multimedia subsystems for mobile SoCs.
Role type
Senior IC verification engineer (ASIC)
Builds
Computer Vision hardware IP and multimedia subsystems for mobile SoCs
Domain
Semiconductor / ASIC Design / Computer Vision
Deliverable
production ML models
Required skills
System Verilog, UVM, C/C++, Python, Perl, Tcl, AXI/AHB/APB protocols, coverage-driven constrained random verification, assertion-based formal verification
Preferred skills
Formal verification, AMBA Bus protocol expertise
Technologies
System Verilog, UVM, Python, Perl, Tcl, AXI, AHB, APB
Responsibilities
Create and maintain verification testbenches and environments; Collaborate with architecture, software, and design teams to define test methodology; Execute system-level test content including directed testcases and compliance suites; Build automation for continuous integration and testing; Participate in micro-architecture reviews.
Seniority
Senior, hands-on IC
