Senior ASIC Verification Engineer
Core
Senior ASIC Verification Engineer developing test-benches, VIPs, and coverage-driven verification for telecom ASIC/SoC designs.
Role type
Senior hands-on IC ASIC Verification Engineer
Builds
Production verification environments and test-bench components for Ericsson's hardware development
Domain
Telecom hardware / ASIC verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production verification environments
Required skills
SystemVerilog, UVM, test-bench development, VIP development, assertions (SVA), coverage analysis, digital design, Linux development
Preferred skills
Telecom/networking ASIC verification, regression flows, CI environments, mentoring
Technologies
SystemVerilog, UVM, Linux
Responsibilities
Develop verification test-benches from scratch, Develop tests using SystemVerilog and UVM, Develop Verification IPs (VIPs) from scratch, Implement SystemVerilog Assertions (SVA), Analyze coverage results and create tests for closure, Participate in technical interviews and candidate evaluations
Seniority
Senior, hands-on IC
