Senior Custom SOC IP Verification Engineer
Core
Lead ASIC design verification for various processing blocks in a System on Chip (SOC), including planning, execution, coverage, and methodology development.
Role type
Senior IC ASIC/SOC verification engineer
Builds
Purpose-built ASICs and custom SOCs for consumer graphics, self-driving cars, and AI
Domain
Semiconductor / ASIC Design Verification
Required skills
UVM, C++, Perl, Python, AMBA protocols (AXI, ACE, CHI, ATB), ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, Network on chip, Synopsys VCS, Cadence Xcelium, Verdi, JasperGold, VC Formal
Technologies
Synopsys VCS, Cadence Xcelium, Verdi, JasperGold, VC Formal
Responsibilities
Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development; Collaborate with multiple teams (Architecture, SW/FW, Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans; Analyze SOC and IP architecture, develop verification plans, and establish performance metrics; Plan tests, achieve coverage closure, and enable customer TB infrastructure; Validate use cases for power-on and boot requirements.
Seniority
Senior, hands-on IC
