Senior DFT Designer
Core
Design, implement, and verify DFT architectures for complex mixed-signal and digital SoCs to ensure robust testability and high-quality silicon.
Role type
Senior IC DFT Designer
Builds
Mixed-signal and digital integrated circuits (SoCs)
Domain
Semiconductor / Digital IC Design
Required skills
DFT methodologies (Scan, MBIST, LBIST, JTAG), ATPG tools, UPF/CPF low-power DFT, Verilog/SystemVerilog/VHDL, fault models, physical design constraints, silicon debug, ATE bring-up
Preferred skills
Mentorship, industry trend awareness
Technologies
Verilog, SystemVerilog, VHDL, ATPG tools, UPF, CPF
Responsibilities
Lead full DFT design flow (specification, architecture, RTL coding, synthesis, STA, verification), develop scan insertion and test compression, implement memory BIST, collaborate with RTL/physical design/test teams, optimize test coverage and time, perform RTL/gate-level verification, work with ATE teams for test program development, participate in post-silicon validation, mentor junior engineers, generate design documentation
Seniority
Senior, hands-on IC
