Senior IC verification engineer
Core
Define, execute, and improve verification activities for complex integrated circuits supporting hearing, hearables, and healthcare IoT applications.
Role type
Senior IC verification engineer
Builds
Complex low-power SoCs, DSPs, and AI-enabled edge processing products
Domain
Semiconductor / Mixed-signal IC design
Deliverable
production ML models
Required skills
SystemVerilog, UVM, RTL verification, gate-level simulation, timing-annotated verification, power-aware verification, mixed-signal verification, debugging complex system-level issues, coverage analysis, automation tools
Preferred skills
Power aware verification, gate-level simulation, timing verification, analog mixed-signal (AMS) verification, AI and machine-learning based systems
Technologies
SystemVerilog, UVM, AI-assisted workflows
Responsibilities
Translate system and module specifications into comprehensive verification plans and coverage strategies; Drive verification closure through functional, code and assertion coverage analysis; Execute RTL, gate-level, timing-annotated, power-aware and mixed-signal verification activities; Analyze simulation results, debug complex system-level issues and work with design teams to resolve problems; Leverage modern technologies, including AI-assisted workflows and automation tools, to improve verification productivity and quality; Take ownership of subsystem-level verification activities and coordinate day-to-day verification work; Report progress, risks and technical status to the IC Verification Lead and project stakeholders.
Seniority
Senior, hands-on IC
