Senior IC Design Verification Engineer
Core
Design Verification Engineer for advanced microcontrollers and microprocessors, specifically creating networking switch and network controller IP cores supporting TSN standards.
Role type
Senior IC Design Verification Engineer
Builds
Networking switch and network controller IP cores (NETC) integrated into System on Chip (SoC) products for automotive, IoT, and networking markets.
Domain
Semiconductor hardware engineering, embedded processing, networking protocols (TSN, Ethernet)
Deliverable
production ML models | product features
Required skills
System Verilog, UVM Verification, EDA tools, Python/TCL/Perl scripting, Git, SoC development methodology, performance/complexity trade-off analysis, verification infrastructure architecture
Preferred skills
Formal and Functional Safety Verification, TCP/IP protocols, router/bridge/switch data products, security/cryptography
Technologies
System Verilog, UVM, Python, TCL, Perl, Makefile, Shell, Git
Responsibilities
Verify Ethernet/networking IP for next-generation SoCs; Architect and implement UVM verification environments for hardware IP & SoC; Perform trade-off analysis on performance and complexity; Build directed and random verification tests; Debug test failures and resolve defects with design engineers; Review functional and code coverage metrics; Drive continuous improvement in verification methodology
Seniority
Senior, hands-on IC
